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Comment:Add assert()s to show that jumps always land an an instruction that is between 1 and Vdbe.nOp-1. Had these assert()s been in place before, they would have caused an assertion fault for the byte-code error reported by forum post 2482b32700.
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SHA3-256: 8f8a58feb7047d19522ca32efbe42fd9ddf49aaf9064f7373eb56a88982406a2
User & Date: drh 2022-05-03 12:11:16
Context
2022-05-03
14:25
Fix the Bloom filter pull-down optimization so that it jumps to the correct place if it encounters a NULL key. Fix for the bug described by forum thread 2482b32700384a0f. (check-in: 3dc9fc2f user: drh tags: branch-3.38)
14:01
Fix the Bloom filter pull-down optimization so that it jumps to the correct place if it encounters a NULL key. Fix for the bug described by forum thread 2482b32700384a0f. (check-in: 6eda9b1a user: drh tags: trunk)
12:11
Add assert()s to show that jumps always land an an instruction that is between 1 and Vdbe.nOp-1. Had these assert()s been in place before, they would have caused an assertion fault for the byte-code error reported by forum post 2482b32700. (check-in: 8f8a58fe user: drh tags: trunk)
2022-05-02
15:47
Remove a testcase() macro taht was made obsolete by [a8da85c57e07721d]. (check-in: 053cf45e user: drh tags: trunk)
Changes
Unified Diff Ignore Whitespace Patch
Changes to src/vdbe.c.
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  pOut->u.i = pOp->p3 - 1;
  pOut->flags = MEM_Int;
  if( pOp->p2==0 ) break;

  /* Most jump operations do a goto to this spot in order to update
  ** the pOp pointer. */
jump_to_p2:


  pOp = &aOp[pOp->p2 - 1];
  break;
}

/* Opcode:  EndCoroutine P1 * * * *
**
** The instruction at the address in register P1 is a Yield.







>
>







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  pOut->u.i = pOp->p3 - 1;
  pOut->flags = MEM_Int;
  if( pOp->p2==0 ) break;

  /* Most jump operations do a goto to this spot in order to update
  ** the pOp pointer. */
jump_to_p2:
  assert( pOp->p2>0 );       /* There are never any jumps to instruction 0 */
  assert( pOp->p2<p->nOp );  /* Jumps must be in range */
  pOp = &aOp[pOp->p2 - 1];
  break;
}

/* Opcode:  EndCoroutine P1 * * * *
**
** The instruction at the address in register P1 is a Yield.